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analog automation analog verification Architecture ASIC Brian Bailey Cadence checkers C model Complex Architectures corner cases coverage coverage driven methodology coverage grid Coverage metrics coverage monitors DAC Dave Whipp Debugging Design design entry designers' guide consulting digital verification directed assembly code tests directed testing Distribution of Coverage Points Doug Smith Doulos DVClub DVCon emulation Eric Hennenhoefer ESL formal verification functional design verification functional verification general purpose microprocessor modeling OVM RTL testbench SystemVerilog Technical Review UVM Validation Verification verification jobs
Tag Archives: hardware based verification
Posted on February 20, 2009 by admin
Anyone who has worked on a microprocessor design in recent years knows that verification has become a larger and larger share of the effort to bring a product to market. Designs are becoming increasingly complex and this complexity is often … Continue reading →
Posted in Technical Review
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Tagged emulation, hardware based verification, RTL emulator hybrid, RTL testbench, verification completion, verification platforms
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