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analog automation analog verification Architecture ASIC Brian Bailey Cadence checkers C model Complex Architectures corner cases coverage coverage driven methodology coverage grid Coverage metrics coverage monitors DAC Dave Whipp Debugging Design design entry designers' guide consulting digital verification directed assembly code tests directed testing Distribution of Coverage Points Doug Smith Doulos DVClub DVCon emulation Eric Hennenhoefer ESL formal verification functional design verification functional verification general purpose microprocessor modeling OVM RTL testbench SystemVerilog Technical Review UVM Validation Verification verification jobs
Author Archives: saturday
Posted on June 14, 2011 by saturday
The slides from the latest DVClub Bristol are now available here: Populations, Variety and Selection: Verifying Complex Designs Our next DVClub event will be on “Assertion-Based Verification” in September. We are also planning a one-day UK verification conference in November. … Continue reading →
Posted on May 10, 2011 by saturday
D&V engineers are always on the look out for new tools to help rapidly create assertions for ABV. In this video, NextOp’s Yuan Lu talks about a real life case study of the “BugScope” tool in action, as described in … Continue reading →
Posted on April 28, 2011 by saturday
Re-posted from Cadence Industry Insight Blog Original Article by Richard Goering on April 26, 2011 Assertion-based verification has many advantages, but is not particularly easy to use. At Silicon Valley DVClub April 26, two engineers discussed the benefits and challenges … Continue reading →
Posted on April 20, 2011 by saturday
DVClub (Design Verification Club) has announced the formation of a new international chapter in Delhi, India. This marks the second DVClub chapter in India after the Bangalore chapter, which has been operating since 2007. The Delhi group’s premiere event is … Continue reading →
Posted on March 2, 2011 by saturday
The Design Verification Club (DVClub) is currently seeking individuals to present on verification related topics at upcoming events. Ideal candidates will be verification managers, project leads or SMTS at semiconductor design companies. The goal of DVClub events is to help … Continue reading →
Posted on January 25, 2011 by saturday
Obsidian Software recently selected six students and recent-grads from across the US to attend the 11th Annual Workshop on Microprocessor Test and Verification in Austin. When we asked them about this conference as compared to others that they had attended, … Continue reading →
Posted on January 13, 2011 by saturday
Using Bug Arrival Rates to Predict the Future Greg Smith, Sr. Verification Manager at Oracle Abstract: So much of today’s metrics used to gauge the progress of a verification project are backwards looking – telling us what ground we have … Continue reading →
Posted in Austin, Design Verification
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Tagged coverage, coverage driven methodology, Coverage metrics, Debugging, functional design verification
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Posted on December 8, 2010 by saturday
Presentations: “Advanced methodologies used for top-level verification of mixed signal products”, Roger Witlox, Sr. Verification Engineer, PL Integrated IVN & FlexRay, NXP PDF Slides The described verification approach is used to verify IC’s that are used in automotive in-vehicle networks. … Continue reading →
Posted on December 8, 2010 by saturday
Doug Smith of Doulos announced today topic selections for his upcoming verification tutorials at DVClub Austin on December 15th. This promises to be our biggest event of the year. If you’re not already registered to attend, then we invite you … Continue reading →
Posted in Austin, Design Verification
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Tagged Doug Smith, Doulos, modeling, OVM, SystemVerilog, UVM, Verification
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Posted on November 23, 2010 by saturday
The 11th International Workshop on Microprocessor Test and Verification (MTV 2010) will be held December 13–15, at the Hyatt Regency in Austin, TX. Scope The purpose of MTV is to bring researchers and practitioners from the fields of verification and … Continue reading →
