Upcoming Events

Verification Metrics - Double Header

Using Bug Arrival Rates to Predict the Future - PDF Slides - Sample Metrics

Greg Smith -- Sr. Verification Manager at Oracle

Abstract:

So much of today's metrics used to gauge the progress of a verification project are backwards looking - telling us what ground we have covered. In addition, many metrics commonly in use are subjective and prone to human errors of omission. I would like to present a different approach to DV project metrics using bug arrivals to actually provide some predictive capability as well as aid in overall project planning.

Bio:

· Greg Smith has over 25 years of experience in the design of processors, ASICs and full systems.
· Greg Smith is currently a Senior Manager of Design Verification for SPARC cores at Oracle - a position he has held for 5 years.
· Prior to Oracle, Greg managed the design and verification of fault tolerant ASIC designs for Tandem Computers. It was at Tandem/HP that Greg developed a passion for metrics as a tool for determining design quality and completion which lead to the tape out of a dozen ASICs each of which had first pass success.
· Prior to Tandem Greg was managing the development of a VLIW mini-supercomputer system at a
company called MultiFlow in New Haven, Connecticut.
· Greg started his career designing minicomputer systems at Prime Computer in Natick, Mass.
· Greg holds a BSCS from Ohio Sate and bleeds scarlet and gray.

High Performance Collection of Coverage Metrics Using a Relational Database Backend - PDF Slides

James Roberts -- Sr. Verification Engineer at Oracle

Abstract:

A database is an ideal medium for collecting and analyzing coverage. At Oracle, we marry our Oracle database with coverage collection of our verification, and then use SQL to extract coverage metrics on-demand. This presentation outlines an intuitive scheme for database collection of coverage, and presents data showing the scalability and the high bandwidth this scheme is able to handle.

Bio:

· James Roberts is a Senior Verification Engineer in UltraSparc design at Oracle (formerly Sun).
· Prior to Sun, he worked at Intel as a Circuit Design Engineer and Verification Engineer.
· He also worked on physical verification and custom design at a couple other companies, including Freescale in Austin.
· Mr. Roberts holds an MSEE from Georgia Tech, and is a card-carrying Yellowjacket.