Upcoming Events

Event 

Title:
Silicon Valley - Assertion Based Verification Flows: A Tale of Two Case Studies
When:
04.26.2011 - 04.26.2011 11.30 h - 13.30 h
Where:
Dave & Buster's - Milpitas, CA
Category:
Silicon Valley

Description

In an all new format, this DVClub event will feature two presentations giving unbiased reviews of user experiences with assertion based verification tools.

Presentations:

NextOp BugScope case study - PDF

Jing Li - Verification Manager, Broadcom


Abstract:

Broadcom has adopted Assertion Synthesis technology. Our verification environment consists of block level and system level simulation, formal property checking, emulation and acceleration. Synthesized assertions have been deployed in all these verification flows as a part of assertion-based verification methodology. This presentation will focus on how the Assertion Synthesis flow works, and the benefit of using Assertion Synthesis over hand written assertions and results.


Bio:

Jing is Senior Manager of Verification in Broadcom’s Network Switching group. She has over 10 years of experience in various areas of verification including block level, chip level, Formal and verification methodology. She has a BSEE from UC Berkeley and MSEE from Stanford.


Zocalo Zazz case study - PDF

Eric Deal - President, Cyclic Design


Abstract:

Assertions are a powerful tool that both design and verification engineers can use to shorten verification debug time and quickly identify failures within a design. While the large processor companies rely heavily on assertions, few design teams in other areas have adopted them. This presentation discusses the benefits of using SystemVerilog Assertions (SVA), barriers to SVA adoption, and how Zocalo's Zazz has enabled Cyclic Design to easily and effectively implement assertions in its IP, benefiting both internal verification as well as customer integration.

 

Bio:

* Eric is the founder and President of Cyclic Design, a silicon IP/consulting company specializing in error correction solutions for NAND flash.
* He has 18 years digital logic design and architecture experience at companies such as IBM, Rockwell/Conexant, Sigmatel, and Multixtor.
* Eric has helped develop several SOC platforms and has experience with error correction (ECC), encryption, security, image processing, system bus, clocking, and I/O interfaces.
* He promoted the use of OVL assertions while at Conexant and was an early adopter of SystemVerilog assertions while at Sigmatel.
* Eric has a Bachelor's Degree in Electrical Engineering from Texas A&M University.


Venue

Dave & Buster'sMap
Venue:
Dave & Buster's   -   Website
Street:
940 Great Mall Dr.
ZIP:
95035
City:
Milpitas, CA
Country:
Country: us

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