Upcoming Events

DVClub Delhi – A focused opportunity to meet DV experts in the Delhi region.

Topics:

• Verilog to UVM Migration Guidelines
• Verification Automation using IPXACT
• Transaction Based Emulation
• Randomizing SV based Mixed Signal Simulation
• Metrics for Simulation Performance
• System Verilog Assertions Quiz

Agenda:

09:00 – Guest arrival
09:15 – Welcome & DVClub Update
09:30 – Verilog to UVM Migration Guildelines - Mehul Kumar and Nitin Goel
10:00 – Transaction Based Emulation - Harminder Bagga
10:30 – Metrics for Simulation Performance Improvement - Abhishek Jain
11:00 – Tea Break
11:15 – Verification Automation Using IPXACT - Rohit Jindal and Raman Singla
11:45 – Randomizing SV Based Mixed Signal Simulation - Tejbal Prasad
12:15 – SystemVerilog Assertions Quiz - Nitin Ahuga
12:30 – Open Forum Discussion and Awards
13:00 – Networking, Lunch, and Close

Logistics:

Cadence sponsored Tea and Lunch

Infinity Conference Room
Cadence Design Systems, NEPZ