Events

General Verification

Jon Michelson

The Future of SystemVerilog Verification - pdf  

Jon Michelson has over nine years of experience verifying complex designs and writing verification infrastructure tools. He received his bachelor’s and masters’s degree in electrical engineering and computer science from M.I.T. He is a co-author of "The Art of Verification with SystemVerilog Assertions" and "The Art of Verification with VERA." He was a co-designer of a verification language and methodology at Silicon Graphics. Michelson is currently at Cisco Systems, designing and verifying complex systems."

Jon's new book "The Art of Verification with SystemVerilog Assertions" can be preordered at the DV Central web site.