Events

Roundtable Discussion: Globalization’s Effect on Engineering Careers in the Valley

Unmesh Agarwala

Unmesh Agarwala is presently VP of Hardware Engineering for the Infrastructure Products Group at Juniper Networks where he manages a global dispersed team of engineers. He has 25 years of industry experience and has previously held management and engineering positions at SGI, Tandem Computers and Intel. He holds a B.S.E.E. from the Indian Institute of Technology in Mumbai and a M.S.C.E. from the University of Southern California in Los Angeles.

Mike Schuh - General Partner, Foundation Capital

Mike has more than 35 years of experience in the software industry, including four technology start-ups. Twice in his career, Mike has created market-leading enterprise software companies: Computervision in the CAD/CAM market and Cadence in EDA (Electronic Design Automation). There are very few operational challenges Mike hasn't faced and tackled successfully somewhere along the line.

Before joining Foundation Capital in 1998, Mike was CEO, co-founder, and chairman of the board of Intrinsa Corporation, a software applications company that was acquired by Microsoft. Mike was the vice president of sales at Clarify, Cadence Design Systems and Computervision prior to co-founding Intrinsa.

Mike currently serves on the boards of Netflix (NFLX), Responsys, BoardVantage, ONStor, Jasper Design Automation and VaST.

Mike has been a passionate runner for more than 30 years, and has successfully completed 20 marathons. Mike has an affinity for California wines.

Mike received a BSEE from the University of Maryland.

Ravi Selvaraj - Vice President of ASIC Engineering, SiNett Corp.

Ravi has over 15 years of experience in ASIC/chip development and engineering management. He was the first ASIC engineer hired at Maverick Networks and was a key member responsible for the now famous StrataSwitch product line. He has successfully designed and delivered multiple complex high-density 0.13u silicon.

He is recognized as an industry leader in deep sub-micron design. Ravi has extensive knowledge in front-end and back-end chip development, and high-speed networking design. Ravi holds an MSEE and has finished 3-year course work towards a PhD at RPI.