Events

General Verification

Chuck Alley - IBM

Using PSL and FoCs for Functional Coverage Verification - pdf

Chuck Alley is an Advisory Engineer at IBM, in the IBM Systems and Technology Group. He has spent the last 11 years with IBM, specializing in microprocessor development, and functional verification of microprocessors and microprocessor systems in particular. Currently, he is working on verifying the L2 cache subsystem for a large scale-out processor design. In the past he has worked on most of IBM's embedded CPU offerings, two of their three game systems, and two of their most recent server processors.

Chuck has written and delivered papers at the IEEE CICC (custom integrated circuits conference) in San Jose and at IBM's Verification Conference in Germany and Poughkeepsie, NY. He has two verification related patents (applied for and pending).

Although Chuck spends most of his time working, he does manage to make time for his favorite television shows. To distinguish himself from the great masses of engineers surrounding him, he plans on investing his free time in ventures around the North Carolina area, such as week-long backpacking trips in the Great Smoky Mountains. To date, however, he has not had the time.

Joe Rash - CebaTech Inc.

Verification Planning and Metrics to ensure efficient program execution - pdf

Joe is currently working for CebaTech Inc. where he is responsible for product management and business development of their IP product lines. Prior to joining CebaTech, Joe held a number of management and leadership positions at AMCC, Nortel Networks, and IBM. As the Director of engineering at AMCC, Joe was responsible for company wide verification methodology, instituted and sponsored a company wide verification users group, and had development responsibility for a number of complex framer and network processor ASICs.