Design Verification Club

Mixed Signal Verification

Adam Krolnik

The Design is not Correct! - pdf

Adam is the verification manager of ZSP (DSP) Technology of LSI Logic Corp in Plano Texas. His career as a verification engineer spans 15 years involving verification of microprocessors, memory systems, cache coherency systems, processor buses, and bus bridges. He has also been involved in creating custom assertion tools. He has been involved in the IEEE verilog standards group, and the Accellera SystemVerilog standards group. He is the co-author of "Assertion-Based Design", a book on efficient use of assertions during the design process. He holds a BSEE degree from the University of Wisconsin in Madison.