Design Verification Club

Prabhu Bhairi - Texas Instruments, Bangalore

Approaches for Power Management Verification of SoC Having Dynamic Power and Voltage Switching - pdf

• Currently working as Verification manager of OMAP SoC’s in Texas instruments India. Responsible for overall SoC verification of OMAP chips and specialized in low power verification domain
• Working in Texas instruments from past 7 years, have lead several SoC verification activities. The designs worked are mainly targeted to Mobile handset application processing and modems
• Have about 10 years of working experience in VLSI mainly on in the front end design and verification domain. Currently staff member of technical group in Texas instruments
• Prior to joining TI, worked in Wipro Technology as Senior Design engineer
• B.E. in PDA from college of engineering, Gulbarga

Swaminathan Venkatesan - Cadence, Bangalore

HW-SW Co-Verification : A Constrained Random Approach - pdf

• Swaminathan Venkatesan has over 10 years of experience in Design and Verification of complex network asic’s, processors and SoC
• Currently working at Cadence Design Systems, Bangalore as a Technical lead for Incisive Verification Kit
• Current interests include SoC Verification Methdologies, System Low Power verification and Metric driven Acceleration
• Swami has presented verification seminars and workshop at various conferences organized by IPSoC, VLSI Society of India and at CDNLive!
• Swami holds a Masters Degree from Indian Institute of Science and a Bachelors from Madras University

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