Events
Event
- Title:
- Austin - Q4 2006 - Milind Padhye, Subrata Roy
- When:
- 11.20.2006 11.30 h - 01.30 h
- Where:
- Dave & Buster's - Austin, TX
- Category:
- Austin
Description
Low Power Functional Verification Challenges
Milind Padhye - Wireless Low Power Design Manager, Freescale
Wireless Low Power and Verification Challenges - pdf
Milind is a Low Power Design Manager in the Freescale Wireless group. He has been working on multiple low power initiatives at Freescale and has multiple patents and disclosures in low power design. Milind has worked closely with multiple EDA vendors to drive low power design methodologies.Subrata Roy - Senior Design Engineer, Silicon Labs
Verifying Power Domains in AeroFONE - pdf
Subrata Roy is a Senior Design Engineer in the Wireless Division of Silicon Laboratories. Prior to joining Silicon Labs he was at Agere Systems, NJ working on verification of 3G Digital Baseband ICs and at AT&T/Lucent Bell Labs working on DFT methodologies. He has a Bachelors in Electronic Eng. from I.I.T. -Kharagpur, a Master's in Computer Science from I.I.T-Kanpur followed by a 2 year stint at Rutger's University, NJ doing Graduate research on VLSI design methodologies.
Venue

- Venue:
- Dave & Buster's - Website
- Street:
- 9333 Research Blvd. Suite A600
- ZIP:
- 78759
- City:
- Austin, TX
- Country:
-
